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RT9712 ? ds9712-04 november 2012 www.richtek.com 1 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. 90m , 1a/1.5a high-side dual power switches with flag ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. pin configurations sop-8/msop-8 (top view) RT9712a/c RT9712b/d features z z z z z 90m n-mosfet switch z z z z z operating voltage range : 2.7v to 5.5v z z z z z reverse blocking current z z z z z under voltage lockout z z z z z deglitched fault report (flgx) z z z z z thermal protection with foldback z z z z z over current protection z z z z z short circuit protection z z z z z ul approved ? ? ? ? ? e219878 z z z z z nemko approved-no49352 z z z z z rohs compliant and halogen free gnd vin vout2 vout1 en1 en2 2 3 4 5 8 7 6 flg2 flg1 gnd vin vout2 vout1 en1 en2 2 3 4 5 8 7 6 flg2 flg1 applications z usb peripherals z notebook pcs RT9712 package type s : sop-8 f : msop-8 lead plating system g : green (halogen free and pb free) output current/enx function a : 1.5a/active high b : 1.5a/active low c : 1a/active high d : 1a/active low marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area. general description the RT9712 power-distribution switches are designed to fulfill the applications in heavy capacitive loads and short- circuit situations. the device incorporates two 90m n- mosfet power switches to fit power distribution systems requiring multiple power switches in a single package. during switching process, an internal charge pump is designed to provide the gate drive for the purpose of power- switch rise times and fall times controlling to minimize the current surges. the charge pump can operate in supply voltage as low as 2.7v and needs no external components. if the output load exceeds the current-limit threshold or a short-circuit occurs.the RT9712 series pull the overcurrent (flgx) logic output low by switching into the constant- current mode to maintain the output current in a safe level, a thermal protection circuit turns off the switch to prevent the device from damage when power dissipation is increased by continuous heavy overloads and short-circuits in the switch and finally cause the rise of the junction temperature. the device automatically recovers when it has sufficiently cooled down. the RT9712a/b are designed for the current limit at typically 2a and RT9712c/d are designed for the current limit at typically 1.5a. internal circuitry controls the switch to remain off until valid input voltage is presented.
RT9712 2 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional pin description typical application circuit note : r1, r2 : pull-up resistance (10k to 100k) pi n no. pin name pin function RT9712a/c RT9712b/d 1 1 gn d ground. 2 2 vin input voltage. -- 3 en1 chip enable (active low) turns on power switch in vout1. -- 4 en2 chip enable (active low) turns on power switch in vout2. 3 -- en1 chip enable (active h igh) turns on power sw itch in vout1. 4 -- en2 chip enable (active h igh) turns on power sw itch in vout2. 5 5 flg2 over current or over temperature status output, open-drain output, active lo w, in vou t2. 6 6 vout2 power-switch output, in vout2. 7 7 vout1 power-switch output, in vout1. 8 8 flg1 over current or over temperature status output,, open-drain output, active lo w, in vou t1. RT9712a/b/c/d gnd vin vout2 vout1 load load supply voltage 2.7v to 5.5v 2 3 4 5 8 7 6 1 flg2 flg1 0.1uf c in c out1 0.1uf 0.1uf c out2 r2 r1 RT9712a/c chip enable en1/en1 en2/en2 RT9712b/d chip enable 22uf 22uf
RT9712 3 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram gate control output voltage detection delay oscillator uvlo charge pump bias current limiting vout2 vin gnd gate control output voltage detection delay oscillator charge pump bias thermal protection current limiting vout1 flg2 flg1 en1/en1 en2/en2
RT9712 4 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics recommended operating conditions (note 4) z supply input voltage, vin ------------------------------------------------------------------------------------------- 2.7v to 5.5 v z en voltage -------------------------------------------------------------------------------------------------------------- 0v to 5 .5v z junction temperature range ---------------------------------------------------------------------------------------- ? 40 c to 100 c z ambient temperature range ---------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) z supply input v oltage, vin ------------------------------------------------------------------------------------------- 6v z en v oltage -------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sop-8/msop-8 ------------------------------------------------------------------------------------------------------- 469mw z package thermal resistance (note 2) sop-8/msop-8, ja -------------------------------------------------------------------------------------------------- 160 c/w z junction temperature ------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 se c.) --------------------------------------------------------------------------- 260 c z storage temperature range ---------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) ------------------------------------------------------------------------------------------ 2kv (v in = 5v, c in = 1 f, c out1 = c out2 = 10 f, t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max unit input quiescent current i q switch on, r load open -- 70 90 input shutdown current i shdn switch off, r load open -- 0.1 1 a RT9712a/b i outx = 1.3a, v in = 5v, each channel --- 90 110 m switch on resistance RT9712c/d r ds(on) i outx = 1a, v in = 5v, each channel -- 90 110 m RT9712a/b 1.5 2 2.8 current limit RT9712c/d i lim v outx = 4v 1.1 1.5 2.1 a RT9712a/b -- 1.4 -- short circuit fold-back current RT9712c/d i sc_fb v outx = 0, measured prior to thermal shutdown -- 1 -- a logic-low voltage v il v in = 2.7v to 5.5v -- -- 0.8 enx/enx threshold logic-high voltage v ih v in = 2.7v to 5.5v 2 -- -- v enx/enx input current i enx/enx v enx/enx = 0v to 5.5v -- 0.01 0.1 a output leakage current i leakage v enx = 0v, v enx = 5v, r load = 0 - 0.5 1 a output turn-on rising time t on_rise 10% to 90% of v out rising -- 175 -- s flgx output resistance r flg i sink = 1ma -- 20 -- flgx off current i flg_off v flgx = 5v -- 0.01 1 a flgx delay time t d from fault condition to flg assertion 5 12 20 ms
RT9712 5 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a low effective thermal conductivity single-layer test board per jedec 51-3. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit shutdown auto-discharge resistance r discharge v enx = 0v, v enx = 5v -- 100 150 under voltage lockout v uvlo v in increasing 1.3 1.7 -- v under voltage hysteresis v uvlo v in decreasing -- 0.1 -- v thermal shutdown protection t sd v outx > 1v -- 120 -- c thermal shutdown protection v outx < 1v -- 100 -- c thermal shutdown hysteresis -- 20 -- c
RT9712 6 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics on resistance vs. input voltage 90 91 92 93 94 95 96 2.533.544.555.5 input voltage (v) on resistance (m ? ) i out = 1.4a on resistance vs. temperature 70 75 80 85 90 95 100 105 110 115 120 -40 -20 0 20 40 60 80 100 temperature (c) on resistance (m ? ) v in = 5v, i out = 1.4a no load quiescent current vs. input voltage 20.0 22.5 25.0 27.5 30.0 32.5 35.0 37.5 40.0 42.5 45.0 47.5 50.0 2.533.544.555.5 input voltage (v) quiescent current (a ) quiescent current vs. temperature 20.0 22.5 25.0 27.5 30.0 32.5 35.0 37.5 40.0 42.5 45.0 47.5 50.0 -40 -20 0 20 40 60 80 100 temperature (c) quiescent current (a ) v in = 5v, no load shutdown current vs. input voltage 0.00 0.05 0.10 0.15 0.20 0.25 0.30 2.533.544.555.5 input voltage (v) shutdown current (a ) no load shutdown current vs. temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -40 -20 0 20 40 60 80 100 temperature (c) shutdown current (a ) v in = 5v
RT9712 7 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. current limit vs. input voltage 1.5 1.6 1.7 1.8 1.9 2.0 2.533.544.555.5 input voltage (v) current limit (a) short current vs. input voltage 1.0 1.1 1.2 1.3 1.4 1.5 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) short current (a) short current vs. temperature 1.0 1.1 1.2 1.3 1.4 1.5 -40-20 0 20406080100 temperature (c) short current (a) v in = 5v current limit vs. temperature 1.5 1.6 1.7 1.8 1.9 2.0 -40-20 0 20406080100 temperature (c) current limit (a) v in = 5v uvlo threshold vs. temperature 1.0 1.2 1.4 1.6 1.8 2.0 -40 -20 0 20 40 60 80 100 temperature (c) uvlo threshold (v) rising falling output voltage vs. output current 0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 output current (a) output voltage (v) v in = 5v v in = 2.7v
RT9712 8 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. flg delay time vs. input voltage 5 6 7 8 9 10 11 12 13 14 15 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) flg delay time (ms) no load power on from vin time (2.5ms/div) v out (2v/div) v in (2v/div) no load power off from vin time (2.5ms/div) v out (2v/div) v in (2v/div) v in = 5v, r load = 2.7 power on from en time (100us/div) v out (2v/div) i out (500ma/div) en1 (5v/div) v in = 5v, r load = 0.33 flg response time (2.5ms/div) v out (500mv/div) i in (2a/div) en1 (5v/div) flgx (5v/div) flg delay time vs. temperature 12.0 12.4 12.8 13.2 13.6 14.0 -40-20 0 20406080100 temperature (c) flg delay time (ms) v in = 5v
RT9712 9 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications information the RT9712a/b/c/d are dual n-mosfet high-side power switch with enable input, optimized for self-powered and bus-powered universal serial bus (usb) applications. the RT9712 series are equipped with a charge pump circuitry to drive the internal n-mosfet switch; the switch's low r ds(on) , 90m , meets usb voltage drop requirements; and a flag output is available to indicate fault conditions to the local usb controller. input and output v in (input) is the power source connection to the internal circuitry and the drain of the mosfet. v out (output) is the source of the mosfet. in a typical application, current flows through the switch from v in to v out toward the load. if v out is greater than v in , current will flow from v out to v in since the mosfet is bidirectional when on. unlike a normal mosfet, there is no parasitic body diode between drain and source of the mosfet, the RT9712a/ b/c/d prevents reverse current flow if v out is externally forced to a higher voltage than v in when the chip is disabled (v en < 0.8v or v en > 2v). d g s d g s normal mosfet RT9712a/b/c/d chip enable input the switch will be disabled when the en/en pin is in a logic low/high condition. during this condition, the internal circuitry and mosfet will be turned off, reducing the supply current to 0.1 a typical. floating the en/en may cause unpredictable operation. en should not be allowed to go negative with respect to gnd. the en/en pin may be directly tied to v in (gnd) to keep the part on. soft start for hot plug-in applications in order to eliminate the upstream voltage droop caused by the large inrush current during hot-plug events, the ? soft-start ? feature effectively isolates the power source from extremely large capacitive loads, satisfying the usb voltage droop requirements. fault flag the RT9712 series provides a flg signal pin which is an n-channel open drain mosfet output. this open drain output goes low when current limit or the die temperature exceeds 120 c approximately. the flg output is capable of sinking a 10ma load to typically 200mv above ground. the flg pin requires a pull-up resistor, this resistor should be large in value to reduce energy drain. a 100k pull-up resistor works well for most applications. in the case of an over-current condition, flg will be asserted only after the flag response delay time, t d , has elapsed. this ensures that flg is asserted only upon valid over-current conditions and that erroneous error reporting is eliminated. for example, false over-current conditions may occur during hot-plug events when extremely large capacitive loads are connected and causes a high transient inrush current that exceeds the current limit threshold. the flg response delay time t d is typically 12ms. under-voltage lockout under-voltage lockout (uvlo) prevents the mosfet switch from turning on until the input voltage exceeds approximately 1.7v. if input voltage drops below approximately 1.3v, uvlo turns off the mosfet switch. under-voltage detection functions only when the switch is enabled. current limit and short-circuit protection the current limit circuitry prevents damage to the mosfet switch and the hub downstream port. besides, in order to prevent the miss-trigger because of usb plug in and other inrush current, the device allows load current greater than current limit threshold (typically 1.5a for RT9712a/b and 1a for RT9712c/d) at a short time as shown in figure 1.
RT9712 10 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. universal serial bus (usb) & power distribution the goal of usb is to enable device from different vendors to interoperate in an open architecture. usb features include ease of use for the end user, a wide range of workloads and applications, robustness, synergy with the pc industry, and low-cost implementation. benefits include self-identifying peripherals, dynamically attachable and reconfigurable peripherals, multiple connections (support for concurrent operation of many devices), support for as many as 127 physical devices, and compatibility with pc plug-and-play architecture. the universal serial bus connects usb devices with a usb host: each usb system has one usb host. usb devices are classified either as hubs, which provide additional attachment points to the usb, or as functions, which provide capabilities to the system (for example, a digital joystick). hub devices are then classified as either bus-power hubs or self-powered hubs. a bus-powered hub draws all of the power to any internal functions and downstream ports from the usb connector power pins. the hub may draw up to 500ma from the upstream device. external ports in a bus-powered hub can supply up to 100ma per port, with a maximum of four external ports. self-powered hub power for the internal functions and downstream ports does not come from the usb, although the usb interface may draw up to 100ma from its upstream connect to allow the interface to function when the remainder of the hub is powered down. the hub must be able to supply up to 500ma on all of its external downstream ports. please refer to universal serial specification revision 2.0 for more details on designing compliant usb hub and host systems. over-current protection devices such as fuses and ptc resistors (also called polyfuse or polyswitch) have slow trip times, high on-resistance, and lack the necessary circuitry for usb-required fault reporting. the faster trip time of the RT9712a/b/c/d power distribution allow designers to design hubs that can operate through faults. the RT9712a/b/c/d provide low on- resistance and internal fault-reporting circuitry to meet voltage regulation and fault notification requirements. because the devices are also power switches, the designer of self-powered hubs has the flexibility to turn off power to output ports. unlike a normal mosfet, the devices have controlled rise and fall times to provide the needed inrush current limiting required for the bus-powered hub power switch. supply filter/bypass capacitor a 0.1 f low-esr ceramic capacitor from v in to gnd, located at the device is strongly recommended to prevent the input voltage drooping during hot-plug events. however, higher capacitor values will further reduce the voltage droop on the input. furthermore, without the bypass capacitor, an output short may cause sufficient ringing on the input (from source lead inductance) to destroy the internal control circuitry. the input transient must not exceed 6v of the absolute maximum supply voltage even for a short duration. figure 1. current limit short circuit fold-back current output current (a) output voltage (v) current limit trigger point when the load current reaches the trigger point (typically 3.5a for RT9712a/b and 2.8a for RT9712c/d) or short circuit is applied to the output, the device will enter constant current mode until the thermal shutdown occurs or the fault is removed.
RT9712 11 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. output filter capacitor a low-esr 150 f aluminum electrolytic or tantalum between v out and gnd is strongly recommended to meet the 330mv maximum droop requirement in the hub v bus (per usb 2.0, output ports must have a minimum 120 f of low-esr bulk capacitance per hub). standard bypass methods should be used to minimize inductance and resistance between the bypass capacitor and the downstream connector to reduce emi and decouple voltage droop caused when downstream cables are hot-insertion transients. ferrite beads in series with v bus , the ground line and the 0.1 f bypass capacitors at the power connector pins are recommended for emi and esd protection. the bypass capacitor itself should have a low dissipation factor to allow decoupling at higher frequencies. voltage drop the usb specification states a minimum port-output voltage in two locations on the bus, 4.75v out of a self- powered hub port and 4.40v out of a bus-powered hub port. as with the self-powered hub, all resistive voltage drops for the bus-powered hub must be accounted for to guarantee voltage regulation (see figure 7-47 of universal serial specification revision 2.0 ). the following calculation determines v out (min) for multi- ple ports (n ports ) ganged together through one switch (if using one switch per port, n ports is equal to 1) : v out (min) = 4.75v ? [ i i x ( 4 x r conn + 2 x r cable ) ] ? (0.1a x n ports x r switch ) ? v pcb where r conn = resistance of connector contacts (two contacts per connector) r cable = resistance of upstream cable wires (one 5v and one gnd) r switch = resistance of power switch (90m typical for RT9712a/b/c/d) v pcb = pcb voltage drop the usb specification defines the maximum resistance per contact ( r conn ) of the usb connector to be 30m and the drop across the pcb and switch to be 100mv. this basically leaves two variables in the equation: the resistance of the switch and the resistance of the cable. if the hub consumes the maximum current (i i ) of 500ma, the maximum resistance of the cable is 90m . the resistance of the switch can be defined as follows : r switch = { 4.75v ? 4.4v ? [ 0.5a x ( 4 x 30m + 2 x 90m ) ] ? v pcb } ( 0.1a x n ports ) = (200mv ? v pcb ) ( 0.1a x n ports ) if the voltage drop across the pcb is limited to 100mv, the maximum resistance for the switch is 250m for four ports ganged together. the RT9712a/b/c/d, with its maximum 100m on-resistance over temperature can fit the demand of this requirement. thermal shutdown thermal protection limits power dissipation in the RT9712a/b/c/d. when the operation junction temperature exceeds 120 c (typ.), the otp circuit starts the thermal shutdown function and turns the pass element off. the pass element turns on again after the junction temperature cools to 80 c. the ic lowers its otp trip level from 120 c to 100 c when output short circuit occurs (v out < 1v) as shown in figure 2. figure 2. short circuit thermal folded back protection when output short circuit occurs (patent) v out short to gnd 1v v out i out thermal shutdown otp trip point 100 c 100 c 80 c ic temperature 120 c
RT9712 12 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout consideration for best performance of the RT9712 series, the following guidelines must be strictly followed. ` input and output capacitors should be placed close to the ic and connected to ground plane to reduce noise coupling. ` the gnd should be connected to a strong ground plane for heat sink. ` keep the main current traces as possible as short and wide. figure 3. derating curve of maximum power dissipation gnd vin vout2 vout1 2 3 4 5 8 7 6 c in c out1 c out2 gnd the input and output capacitors should be placed as close as possible to the ic. the main current trace should be as possible as short and wide. figure 4. pcb layout guide 0 0.1 0.2 0.3 0.4 0.5 0 102030405060708090100 ambient temperature (c) maximum power dissipation (w ) single layers sop-8/msop-8 power dissipation the junction temperature of the RT9712 series depend on several factors such as the load, pcb layout, ambient temperature and package type. the output pin of RT9712a/b/c/d can deliver the current of up to 1.5a (RT9712a/b), and 0.6a (RT9712c/d) respectively over the full operating junction temperature range. however, the maximum output current must be derated at higher ambient temperature to ensure the junction temperature does not exceed 100 c. with all possible conditions, the junction temperature must be within the range specified under operating conditions. power dissipation can be calculated based on the output current and the r ds(on) of switch as below. p d = r ds(on) x i out 2 although the devices are rated for 1.5a and 0.6a of output current, but the application may limit the amount of output current based on the total power dissipation and the ambient temperature. for continuous operation, do not exceed absolute maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature 100 c, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification, where t j(max) is the maximum junction temperature of the die (100 c) and t a is the maximum ambient temperature. the junction to ambient thermal resistance ja is layout dependent. for sop-8 and msop-8 packages, the thermal resistance ja is 160 c/w. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (100 c ? 25 c) / (160 c/w) = 0.469w for sop-8 and msop-8 packages the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.
RT9712 13 ds9712-04 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension a b j f h m c d i 8-lead sop plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.050 0.254 0.002 0.010 j 5.791 6.200 0.228 0.244 m 0.400 1.270 0.016 0.050
RT9712 14 ds9712-04 november 2012 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. l d e e1 e a b a1 a2 dimensions in millimeters dimensions in inches symbol min max min max a 0.810 1.100 0.032 0.043 a1 0.000 0.150 0.000 0.006 a2 0.750 0.950 0.030 0.037 b 0.220 0.380 0.009 0.015 d 2.900 3.100 0.114 0.122 e 0.650 0.026 e 4.800 5.000 0.189 0.197 e1 2.900 3.100 0.114 0.122 l 0.400 0.800 0.016 0.031 8-lead msop plastic package

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